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Logo: Stiftung Secure Information and Communication Technologies SIC Stiftung Secure Information and Communication Technologies SIC

IAIK IP AES FPGA

This IP module is specialized for use on FPGA. The module makes use of the very efficient structure of CLBs for storing the intermediate value and results therefore in an area-efficient design. AES-128 encryption and decryption in ECB and CBC mode of operation is supported.

Features:

  • Functionality: AES-128, encryption & decryption
  • Mode of operation: CBC, ECB
  • Slices: 800 (Xilinx Virtex 4)
  • Clock Cycles/enc: 95 Max f (Xilinx Virtex 4): 150 MHz
  • Interface: AMBA-APB 32-bit

Deliverables:

  • VHDL, tcl-testbench (Modelsim, Cadence), scripts for synthesis & simulation

 Further technical and sales information:

Please contact sales@iaik.tugraz.at for any further information!

Prices:

Please see our price list.

 

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