print Print
Logo: Stiftung Secure Information and Communication Technologies SIC Stiftung Secure Information and Communication Technologies SIC

Performance-optimized AES Implementation for 8051-based Microcontrollers

For 8051-based microcontrollers we offer a performance-optimized AES implementation. The implementations is the result of our research in implementing cryptographic algorithms. To get best performance it is coded in assembler. It provides a simple interface implemented in C.

Features:
  • Functionality:
    • AES-128 and AES 256 encryption and decryption in ECB mode
    • On-the-fly roundkey generation
    • Automatic decryption key calculation
  • Performance:
    • AES-128 encryption in 3905 instruction cycles
    • AES-128 decryption in 5876 instruction cycles
    • AES-256 encryption in 5372 instruction cycles
    • AES-256 decryption in 8132 instruction cycles
  • Codesize:
    • Codesize for AES-128 is 2079 bytes
    • Codesize for AES-256 is 2412 bytes
    • Codesize for AES-128 & AES-256 is 3224 bytes
Deliverables:
  • Fully documented source code
  • Documentation including architecture and interface description
Sales and Conditions:

The current price for this product you can find from the price list.

To purchase the product, please go to webshop. Please notice that this product is not downloadable from our online-shop, it is always delivered either on a CD or by email.

Further Information:
  • The source code of this implementation is fully reviewed by Vincent Rijmen one of the inventors of AES.
  • Please contact our sales office at sales@iaik.tugraz.at for further details and questions.
 

print Print